• Job Description

  Req#: R-10044764

  Business Line Description

  • This graduate engineering vacancy is within the central architecture team, part of MCU/MPU Engineering (MME) organization. Central architecture is responsible for SoC architecture definition and related performance modeling to cover SoC’s and/or related IP and Subsystems. As an architecture performance modeling engineer, you would support pre-silicon performance modeling to cover IP and/or SoC so as to help define and de-risk the SoC architecture. You will be modeling cores, interconnects and accelerators for next generation devices. You will be interacting with architects, system engineers, customers and 3rd parties on a worldwide basis with the focus on advanced Automotive Processors and microcontrollers

  Job Summary

  • Pre-silicon Performance Modeling to cover IP and/or SoC
  • Development & integration of performance models in SystemC based platforms
  • Design and develop C++ component models based on IP block specifications
  • Integrate SystemC / C++ component models into SoC level simulations
  • Interact with systems team to define customer use-cases and benchmarks
  • Run use-cases, benchmarks, workloads and/or traffic loads on performance models, silicon, and/or development boards in order to quantify and improve overall SoC performance

  Key Challenges:

  • The ability to use performance models to collect and analyze performance data so as to influence, de-risk, and improve the overall IP and/or SoC architecture
  • Will require working cross-organizationally and globally

  Cross functional aspects:

  • Work with System Architects and Technical Marketing to understand the SoC requirements and assist in deriving key use-cases and associated performance metrics
  • Work with lead SoC and/or IP Architects to ensure that the SoC architecture specification is de-risked from a performance perspective
  • Work with IP and/or SoC Verification to ensure that the key performance metrics (KPI’s) are documented, reviewed and part of SoC / IP verification plans

  Job Qualifications:

  • BSEE, MSEE or PhD degree in Computer Science, Electrical, Control or Computer Engineering
  • Experience with SystemC and standard based modeling practices
  • Good C/C++ programming skills and additionally a scripting language such as TCL, Python
  • Experience in SystemC 2.3x, TLM2.0, Platform Architect
  • Knowledge /experience of RTL design (Verilog, VHDL) is a significant plus
  • Embedded programming experience is a plus
  • Knowledge of other simulation tools (e.g. Matlab/Simulink ) is a plus

  Job location:

  • Austin, TX, USA

  More information about NXP in the United States...

  NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

• About the company

  NXP Semiconductors NV is an American Dutch semiconductor manufacturer with headquarters in Eindhoven, Netherlands And Austin .

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