Job Details:

Job Description:

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

We are part of the Datacenter Processor Architecture (DPA) group which is the SoC architecture team responsible for Intel Xeon server CPU development & design. Our team is the Technologies for Reliability & Usage (TRU) Team and we are responsible for a broad range of technologies including reliability, telemetry, performance & power. Our role involves architectural modeling, system measurement & modeling, new technology & feature development and overall SoC architecture initiatives.

Who You Are

Responsibilities may be quite diverse of a technical nature US experience and education requirements will vary significantly depending on the unique needs of the job. Responsibilities will include simulating Intel-based platforms to study and categorize the effects of errors on running systems and AI workloads. Intel internship job assignments are usually for the summer or for short periods during breaks from school.

Qualifications:

Minimum Qualifications

Must be pursuing Master’s Degree or PHD in Electrical/Computer Engineering or Computer Science

• 1+ years of experience/internship program related to their technical major.

• 2+ years of C/C++ development experience

• Experience with scripting languages (Perl, Python, etc.)

Preferred Qualifications

• Experience and interest in RAS methodologies and computer reliability analytics

• Experience and interest in computer architecture for AI/ML and general purpose computing

• Experience with perf. modeling and analysis

• Knowledge of CPU arch. and uarch. is a plus

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location:

US, Massachusetts, Hudson

Additional Locations:

US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$63,000.00-$166,000.00

S al ary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.