Tenstorrent

Fall CPU RTL Intern - AI Silicon (on-site)


PayCompetitive
LocationSanta Clara/California
Employment typeOther

This job is now closed

  • Job Description

      Req#: b78cec91-2595-444f-b268-79fbdb5c8414

      Fall CPU RTL Intern - AI Silicon (on-site)

      Santa Clara, CA /
      Engineering - Hardware – RISC-V /
      Intern
      / On-site
      Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

      Fall CPU RTL Intern - AI Silicon

      In this role, you will work on RTL/Microarchitecture of high-performance CPUs going into industry leading AI/ML architecture. You will be mentored by and work alongside a group of highly experienced engineers across various domains of the AI chip.

      Responsibilities

      • RTL coding for implementing features and logic design for CPU block
      • Understand and debug RTL code for the CPU and help make changes to the design
      • Help with development of architectural tools for ISA level verification
      • Write C/assembly based stimulus that scales from pre-silicon to emulation and post-silicon domain
      • Help with infrastructure and tool development for RTL, Performance and DV environments
      • Support development and integration of testbench components such as microarchitectural models, checkers and coverage

      Experience & Qualifications

      • Senior year BS/MS or PhD candidate in EE/ECE/CE/CS with a strong GPA
      • Prior academic work in the field of computer architecture, internship experience preferred
      • Academic projects in C++ / SV / UVM as well knowledge of scripting languages
      • Understanding of assembly level programming
      • Knowledge of hardware description languages (Verilog, VHDL)
      • Strong academic skills or internship experience in verification methodologies and techniques – Simulation/debug, TB development, stimulus, checking, coverage
      • Strong problem solving and analytical skills
      Locations:
      Santa Clara, CA | Austin, TX (You should be able to work on-site and full-time (40h/week) to be eligible for this role)



      Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
  • About the company

      At Tenstorrent, we build chips to power the models of the future.

Notice

Talentify is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or protected veteran status.

Talentify provides reasonable accommodations to qualified applicants with disabilities, including disabled veterans. Request assistance at accessibility@talentify.io or 407-000-0000.

Federal law requires every new hire to complete Form I-9 and present proof of identity and U.S. work eligibility.

An Automated Employment Decision Tool (AEDT) will score your job-related skills and responses. Bias-audit & data-use details: www.talentify.io/bias-audit-report. NYC applicants may request an alternative process or accommodation at aedt@talentify.io or 407-000-0000.