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RTL Design Engineer - Specialized (US)
6 days agoWhat's your preference?
Job Description
- Req#: 25-04454
- Responsible for RTL design using Verilog HDL for implementation and debug.
- Read and comprehend Analog Macro level architectural specification.
- Modelling Analog-Mixed signal circuits in RTL, with experience in LDOs, BGs and EMC
- Ability to run and debug LECC for design
- Run quality check tool such as Spyglass Lint and fix issues.
- Ability to provide direction on optimal/efficient hierarchical design of Analog-Mixed signal designs
- Ability to run Co-Sim preferred
- Ability to debug DV issues preferred
- 7+ years' experience required
Job Title: RTL Design Engineer
Duration: 6+ months
Location: Santa Clara, CA (Hybrid or remote options)
Job Duties:
Experience:About the company
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