Cynet Systems Inc
Senior RTL Design Engineer
This job is now closed
Job Description
- Req#: 24-05199
- Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff.
- Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency.
- Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks.
- Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows.
- Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts).
- Constantly review/identify the places to improve the process and ways to identify the issues early in the design phase.
- Worked with EDA tools that enable RTL quality checks.
- Hands-on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows.
- Experience with analyzing the timing reports and identifying both the design and constraints related issues.
- Ability to multitask, grasp new flows/tools/ideas.
- Experience in improving the methodologies.
- Preferred EDA tool experience: Client Design Compiler/Primetime, Spyglass, Fishtail etc.
Job Description:
Pay Range $50.64hr - $75.92hrAbout the company
We are a team of technical visionaries who joined forces to form a company that would gather the best and brightest talent in the world. The company uses this talent to help other organizations fulfill their technological dreams and goals and make them a reality. Welcome to Cynet Systems Inc. – a premier staffing and recruiting company – a nationally and locally certified diversity firm.
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