FLIR · Tucson, Arizona, US

FPGA Design Engineer

OpenFull-timePay not stated

Open — FLIR has a posting for this job. Posted 15 Oct 2026.

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Posted 15 Oct 2026 · Full-time · Pay not stated

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About this job

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Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.​

We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.

Job Description

Teledyne Photometrics designs and manufactures high-performance Scientific CMOS, CCD and EMCCD cameras that support demanding, quantitative bio-research.

Job Summary: The FPGA Design Engineer will be responsible for all aspects of design and top-level integration of FPGA embedded systems used for the control of high-speed scientific CMOS cameras for Life Science, Physical Science and Astronomy applications. With expertise in FPGA system development and VHDL/Verilog module design, the successful candidate will optimize digital module development, architectural partitioning, and floor planning to maximize system performance and create and leverage opportunities for IP re-use across multiple hardware platforms.

Key Duties and Responsibilities:

  • Design and develop digital systems on FPGA.
  • Drive FPGA top level integration, floor planning and timing closure.
  • Integrate VHDL/Verilog modules, IP subsystems and embedded microprocessors.
  • Develop and maintain system level simulation environments.
  • Meet challenging power consumption and speed requirements.

Required Skills and Experience

  • MS degree in Electrical Engineering or similar.
  • 5+ years’ experience with FPGA RTL (VHDL/Verilog) module development using Intel Quartus (preferred) or Xilinx Vivado.
  • Expertise in FPGA system integration including designs incorporating RTL modules, IP functions and subsystems, and embedded microprocessor and SoCs.
  • Expertise with FPGA floor planning, synthesis, and timing closure.
  • FPGA system definition tools (Intel Qsys / Platform Designer or similar).
  • Partial and dynamic reconfigurable logic in FPGA.
  • Communication protocols: USB, UART, SPI, I2C, Ethernet
  • High-speed interfaces: LVDS, SERDES, PCIE Gen3/4, CoaXPress, USB 3.2
  • Memory controllers for DDRx

Citizenship Requirements

Due to the type of work at the facility and certain access restrictions, successful applicants must be a U.S. Citizen or Green Card holder.

What can Teledyne offer YOU?
A Competitive Salary & Benefits Package
Excellent Health, Dental, Vision
Paid Vacation Time
Paid Sick Time
Life Insurance Benefits
Paid Holidays
401(k) Eligibility
Employee Stock Purchase Plan
Educational Tuition Reimbursement

Teledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws, regulations, rules and regulatory orders. Our reputation for honesty, integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.

Teledyne is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other characteristic or non-merit based factor made unlawful by federal, state, or local laws. ​

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Not this job's pay

What do Corporate – Information Technology jobs in Arizona pay?

Talentify has no pay figure for this posting. The lines below are about Corporate – Information Technology jobs on Talentify in Arizona as a group, computed by Talentify's job index across their postings. They are not the pay for this job.

Of the 166 Corporate – Information Technology jobs on Talentify in Arizona, 34 list pay per year.

Taking the midpoint of each listed range, the middle half pay 90,500–147,410 USD per year and the median is 117,775 USD per year.

18 of these 34 name no currency; they are counted as USD because the jobs are in the United States.

Pay as employers listed it, not adjusted or verified. Updated 2026-11-07.

Computed on 2026-11-07 from the pay in 34 listings.

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