Intel

SOC Physical Design Engineer Lead


This job is now closed

PayCompetitive
LocationHyderabad/Telangana
Employment typeFull-Time
  • Job Description

      Req#: JR0247461

      Job Details:

      Job Description:

      The Client Development Group is looking for a highly motivated Physical Design Lead to join the backend design team for the next generation of Client SOC. In this position, you will be responsible for managing and working on all aspects of physical design activities of Intel's SoCs in lower technology nodes. Direct Responsibilities: Physical design, convergence and signoff of blocks, sub-chip and SoCs. Responsibilities could include logic synthesis, floor planning, block and/or top level clocking, place and route. Own or work with full chip and block static timing engineers to close timing, formal verification, low power signoff and layout convergence. The ideal candidate will be able to demonstrate the following behaviors: Ability to work effectively with both internal and external teams/customers is expected. Ability to mentor other engineers and technically guide them. Experience with silicon which include processor cores and custom logic working together. Strong problem solving skills Strong written and verbal communication skills Capable of working in a high performing team to deliver the results required from the organization. Facilitator of direct and open communication, diversity of opinion, and debate

      Qualifications:

      Education: B.Tech. or M.Tech. in Electrical/Electronics Engineering with 8+ years' of experience Key skills: Experience in all aspects of physical design flow in SOC. Experience in timing signoff, formal verification and low power static signoff Experience in all aspects of clock distribution. Experience in deep submicron process technology nodes is strongly preferred Solid understanding of power delivery and power plane distributions, power estimation and optimization in SOC. Solid understanding industry standard tools for synthesis, place and route and tape out flows. Solid understanding of physical design verification methods to debug LVS/DRC.

      Job Type:

      Experienced Hire

      Shift:

      Shift 1 (India)

      Primary Location:

      India, Bangalore

      Additional Locations:

      India, Hyderabad

      Business group:

      The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

      Posting Statement:

      All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

      Position of Trust

      N/A

      Work Model for this Role

      This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
  • About the company

      Intel's innovation in cloud computing, data center, Internet of Things, and PC solutions is powering the smart and connected digital world we live in.

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