Cadence Design Systems

Sr Application Engineer Manager


PayCompetitive
LocationSan Jose/California
Employment typeFull-Time

This job is now closed

  • Job Description

      Req#: R45175

      At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

      As an integral member of the North America Verification Field Applications Engineering (AE) Team, you will work directly with industry leading semiconductor and system companies to deploy Cadence’s market leading emulation and FPGA prototyping platforms, Palladium and Protium. In this customer facing role you will provide the front line technical support in the pre and post-sales process and will work with team members to come up with innovative solutions to address our customers’ most challenging problems in emulation and prototyping. As part of the team, you will develop customer specific emulation and prototyping requirements, including advanced acceleration component development, methodology support, and operation and maintenance of Cadence’s emulation and prototyping tools and services. You will support technical evaluations and benchmark development for Cadence’s market leading tools such as Palladium acceleration and emulation platform and Protium prototyping platform. You will create and conduct technical presentations and product demonstrations for customers.

      Key Responsibilities:

      - Establish technical credibility and rapport with the customer

      - Work closely with an experienced team to become the go-to expert for technical inquiries and support for emulation and prototyping

      - Become part of a team that provides in-depth technical assistance in collaboration with R&D to help support advanced acceleration/emulation/prototyping flows to secure design wins

      - Champion the customer needs and work with R&D and marketing to develop competitive and creative technical solutions

      - Learn the competitive landscape and continuously work on differentiating Cadence’s solutions

      - Write technical product literature such as application notes and technical articles

      Requirements:

      Minimum:

      - BS, MS.or PhD degree in Computer Science, Engineering, or related field

      - Strong RTL and Testbench debug skills

      - Experience in synthesizable coding style

      - Experience in writing scripts (Perl, Python or TCL)

      - Strong software, HDL design and verification skills Experience with SystemVerilog, Verilog

      - Ability to quickly analyze verification environments and design complexity

      - Strong verbal and written communication skills

      - Strong teamwork skills

      2+ years industry experience

      Preferred:

      - Experience in HW acceleration, in-circuit emulation or FPGA prototyping

      - Hands on experience with lab bring up, debug, chipscope and instrument usage - - Knowledge of fundamental SoC Architecture knowledge

      - Knowledge of protocols like JTAG, UART, PCIe, AMBA, DDR

      - Knowledge of

      - Digital design experience

      The annual salary range for California is $138,600 to $257,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

      We’re doing work that matters. Help us solve what others can’t.

  • About the company

      Cadence Design Systems, Inc., headquartered in San Jose, California, in the North San Jose Innovation District, is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Sy...